Resisting Hardware Trojan Induced Data Leakage In Seq Logic
Kwiat; Kevin, Kamhoua; Charles, Njilla; Laurent, Shi; Yiyu, Schulze; Travis
Summary
Apparatus, method and article of manufacture providing a randomized encoding scheme for sequential logics, for resistance to data leakage. Invention employs dual-rail encoding to randomize the information in the chip, and employs three-dimensional integration technology to protect the critical information that is needed to decode the data anywhere on-chip. With the present invention, even when the entire design is completely known to the attacker who also has full access to the outsourced portion, it is still not always possible to identify the information in the chip using data leakage Trojans.
Markets
Circuit Design, Cyber Security
Software Availability
Cadence models of sample circuits that embody the patented technology.
IP Status
This technology is the subject of a US patent granted on 2018-11-06. Rights are assigned to the United States Air Force but should be available for licensing.
Key Words
Hardware Trojans, Data Leakage, Split Manufacturing, Dual-Rail Encoding, Randomization, Fight-Through
Licensing
Technology is available for licensing through the US Air Force. Contact the Caesar Group to help connect you to the Tech Transfer agent at the responsible Air Force organization.
Published Date
Nov 6, 2018
Funding Agency
Air Force
References
Locations
Rome NY
Sarasota FL
